This invention relates to duplex driver/receiver modules containing circuitry which permits the modules to transmit and receive data concurrently and is particularly desirable since it operates in CML logic environment.
To be able to provide a fully duplex driver/receiver circuitry, which can drive and receive at the same time, is obviously desirable but quite difficult to build in order to meet the input level requirements of a CML logic environment. The logic voltage swings are designed to be relatively narrow, typically, 0.0 V to -400 mV, yet the circuitry must reject errors introduced into the logic voltage swings due to differential mode noise, as well as variations in the process of manufacture of the components of the module and variations in the voltage levels of the power supply regulators supplying the voltage and current to the modules. Thus, the actual voltage could be -40 mV.ltoreq.HIGH .ltoreq.0.0 V and -500 mV.ltoreq.LOW.ltoreq.-300 mV, which also means that I max/min=.+-.25% of I typical where I typical is designed to current source value. It is possible, taking worst case conditions, that while the data being sent is a logical HIGH and the data being received is a logical LOW, actually the signal voltage level on the input to the module may be higher than the logical HIGH being sent and the circuit must be capable of translating this logical LOW so that the module output to other circuitry is a logical LOW to correspond with the logical LOW being received.